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EVALUATION KIT AVAILABLE
1
TC660
100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER
FEATURES
s s s s s s s s Pin Compatible with TC7660 High Output Current ..................................... 100mA Converts (+1.5V to 5.5V) to (- 1.5V to - 5.5V) Power Efficiency @100mA ......................... 88% typ Low Power Consumption ................200A @ 5 VIN Low Cost and Easy to Use -- Only Two External Capacitors Required Selectable Oscillator Frequency ....... 10kHz/90kHz ESD Protection ................................................... 4kV
GENERAL DESCRIPTION
The TC660 DC-to-DC voltage converter generates a negative voltage supply, that can support a 100mA maximum load, from a positive voltage input of 1.5V to 5.5V. Only two external capacitors are required. Power supply voltage is stored on an undedicated capacitor then inverted and transferred to an output reservoir capacitor. The on-board oscillator normally runs at a frequency of 10kHz with V+ at 5V. This frequency can be lowered by the addition of an external capacitor from OSC (pin 7) to ground, or raised to 90kHz by connecting the frequency control pin (FC) to V+, in order to optimize capacitor size, quiescent current, and output voltage ripple frequency. Operation using input voltage between 1.5V and 3.0V is accommodated by grounding the LV input (pin 6). Operation at higher input voltages (3.0V to 5.5V) is accomplished by leaving LV open. The TC660 open circuit output voltage is within 0.1% of the input voltage with the output open-circuited. Power conversion efficiency is 98% when output load is between 2mA and 5mA.
2 3 4 5 6 7
APPLICATIONS
s s s s Laptop Computers P Based Controllers Process Instrumentation Automotive Instruments
PIN CONFIGURATION (DIP and SOIC)
8 V+ 7 OSC 8 V+ 7 OSC
ORDERING INFORMATION
Part No.
TC660COA TC660CPA TC660EOA TC660EPA
FC 1 CAP + 2
FC 1 CAP + 2 GND 3 CAP - 4
Package
8-Pin SOIC 8-Pin Plastic DIP 8-Pin SOIC 8-Pin Plastic DIP
Temp. Range
0C to +70C 0C to +70C - 40C to +85C - 40C to +85C
GND 3 TC660CPA 6 LV CAP - 4
TC660EPA
5 VOUT
TC660COA 6 LV TC660EOA
5 VOUT
TC7660EV
FUNCTIONAL BLOCK DIAGRAM
V + CAP + 8 FC 1 2
Evaluation Kit for Charge Pump Family
OSC
7
RC OSCILLATOR
/2
VOLTAGE- LEVEL TRANSLATOR
4
CAP -
LV
6 5 INTERNAL VOLTAGE REGULATOR LOGIC NETWORK VOUT
TC660
3 GND
8
TC660-2 9/10/96
TELCOM SEMICONDUCTOR, INC.
4-5
100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC660
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage ........................................................... +6V LV, FC, OSC Input Voltage (Note 1) ....................... VOUT - 0.3V to (V+ +0.3V) Current Into LV (Note 1) ...................... 20 A for V+ >3.5V Output Short Duration (VSUPPLY 5.5V) (Note 3) .. 10 Sec Power Dissipation (Note 2) (TA 70C) SOIC ............................................................... 470mW Plastic DIP ......................................................730mW Operating Temperature Range C Suffix .................................................. 0C to +70C E Suffix ............................................. - 40C to +85C Storage Temperature Range ................ - 65C to +150C Lead Temperature (Soldering, 10 sec) ................. +300C
*Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS: Specifications Measured Over Operating Temperature Range With,
V+ = 5V, COSC = Open, C1, C2 = 150F, FC = Open, Test Circuit (Figure 1), unless otherwise indicated. Symbol
I+
Parameter
Supply Current
Test Conditions
RL = FC pin = OPEN or GND FC pin = V+ LV = HIGH, RL = 1 k LV = GND, RL = 1 k LV = OUT, RL = 1 k (Figure 9) IOUT = 100mA VOUT < - 4V Pin 7 open; Pin 1 open or GND Pin 1 = V+ Pin 1 open Pin 1 = V+ RL = 1 k connected between V+ & VOUT RL = 500 connected between VOUT & GND IL = 100mA to GND RL =
V+
Min
-- -- 3 1.5 2.5 -- 100 -- -- -- -- 96 92 -- 99
Typ
200 1 -- -- -- 6.5 -- 10 90 +1.1 +5 98 96 88 99.9
Max
500 3 5.5 5.5 5.5 10 -- -- -- -- -- -- -- -- --
Unit
A mA V
V+
Supply Voltage Range
ROUT IOUT FOSC IOSC PEFF
Output Source Resistance Output Current Oscillator Frequency Input Current Power Efficiency (Note 4)
mA kHz A %
VOUT EFF
Voltage Conversion Efficiency
%
NOTES: 1. Connecting any input terminal to voltages greater than or less than GND may cause destructive latch-up. It is recommended that no inputs from sources operating from external supplies be applied prior to "power up" of the TC660. 2. Derate linearly above 50C by 5.5 mW/C. 3. To prevent damaging the device, do not short VOUT to V+. 4. To maximize output voltage and efficiency performance, use low ESR capacitors for C1 and C2.
4-6
TELCOM SEMICONDUCTOR, INC.
100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC660
TYPICAL CHARACTERISTICS
All curves are generated using the test circuit of Figure 1 with V+ = 5V, LV = GND, FC = open, and TA = +25C, unless otherwise noted.
1)
600 500
1
2 3
Supply Current vs. Supply Voltage
2)
10,000
Supply Current vs. Oscillator Frequency
3)
100
Efficiency vs. Load Current
V+ = 5.5V
SUPPLY CURRENT (A)
SUPPLY CURRENT (A)
EFFICIENCY (%)
400 300 200
DOUBLER MODE LV = OUT
1000
DOUBLER MODE
92
84 V+ = 3.5V 76 V+ = 4.5V
100
LV = OPEN 100 LV = GND 0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 SUPPLY VOLTAGE (V) 5.0 5.5
10
INVERTING MODE
68
V+ = 2.5V V+ = 1.5V 0 20 40 60 80 LOAD CURRENT (mA) 100
1 0.01 0.1 1 10 OSCILLATOR FREQUENCY (kHz)
100
60
4 5
4)
2.0
Output Voltage Drop vs. Load Current
5)
-5.0
Output Voltage vs. Oscillator Frequency
6)
100 96
Efficiency vs. Oscillator Frequency
ILOAD = 10mA
OUTPUT VOLTAGE DROP FROM SUPPLY VOLTAGE (V)
V+ = 3.5V 1.2 V+ = 1.5V V+ = 2.5V V+ = 4.5V
OUTPUT VOLTAGE (V)
1.6
-4.5 ILOAD = 1mA -4.0
POWER EFFICIENCY (%)
ILOAD = 10mA
92 88 84 80 76 72 68 64 ILOAD = 1mA 0.1 0.2 0.4 124 10 20 40 OSCILLATOR FREQUENCY (kHz) 100 ILOAD = 80mA
ILOAD = 80mA
0.8
-3.5
0.4 V+ = 5.5V 0 0 20 40 60 80 LOAD CURRENT (mA) 100
-3.0 0.1 0.2 0.4 124 10 20 40 OSCILLATOR FREQUENCY (kHz)
100
60
6 7
7)
15
Output Source Resistance vs. Supply Voltage
8)
OUTPUT SOURCE RESISTANCE ()
16 14 12 10
Output Source Resistance vs. Temperature
V+ = 1.5VDC
9)
12
Oscillator Frequency vs. Supply Voltage
LV GROUNDED 10 8 6 FC = OPEN, OSC = OPEN 4 2 0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) LV OPEN
OUTPUT SOURCE RESISTANCE ()
12
9
6
V+ = 3VDC 8 6 V+ = 5VDC 4 -40 -20 0 20 40 60 80 100
3
OSCILLATOR FREQUENCY (kHz)
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V)
TEMPERATURE (C)
8
TELCOM SEMICONDUCTOR, INC.
4-7
100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC660
TYPICAL CHARACTERISTICS (Cont.)
10)
100 OSCILLATOR FREQUENCY (kHz) LV GROUNDED OSCILATOR FREQUENCY (kHz) 80 LV OPEN
Oscillator Frequency vs. Supply Voltage
11)
12 10 8 6 4
Oscillator Frequency vs. Temperature
12)
100 OSCILLATOR FREQENCY (kHz)
Oscillator Frequency vs. Temperature
80
60 FC = V+, OSC = OPEN
60
40
40 FC = V+, OSC = OPEN
20
FC= OPEN, OSC = OPEN 2 0 -40
20
0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V)
-20
20 40 60 TEMPERATURE (C)
0
80
100
0 -40
-20
20 40 60 0 TEMPERATURE (C)
80
100
13)
Oscillator Frequency vs. External Capacitance
14)
TC7660 and TC660 Output Voltage and Power Efficiency vs. Load Current, V+ = 5V
TC7660 100
100 OSCILLATOR FREQUENCY (kHz) FC = V+ OUTPUT VOLTAGE (V) 10
-3.0
TC660 -3.8 EFF VOUT TC660 84
1
-4.2
76
0.1
FC = OPEN
-4.6 TC7660 40 60 80 LOAD CURRENT (mA)
68
0.01
-5.0 12 5 10 20 100 500 2000 10000 CAPACITANCE (pF) 0 2.0
60 100
PIN DESCRIPTION
Pin No.
1 2 3 4 5 6 7 8
Symbol
FC CAP+ GND CAP- VOUT LV OSC V+
Description
Internal Oscillator frequency control. f 10 kHz when FC OPEN; 90 kHz when FC = V+. FC has no effect if OSC is overdriven. External capacitor, + terminal Power-Supply Ground (Inverter) or Positive Input (Doubler) External capacitor, - terminal Negative Voltage output (Inverter) or Ground (Doubler) "Low-Voltage" pin. Connect to GND Pin for inverter operation when VIN < 3V; leave open or GND above 3V. When overdriving OSC, connect to GND. For external control of internal OSC. Connect ext. C from OSC to GND (close to pkg.) to reduce frequency of oscillator Positive Voltage Input (Inverter) or Output (Doubler)
POWER EFFICIENCY (%)
-3.4
92
4-8
TELCOM SEMICONDUCTOR, INC.
100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC660
Circuit Description
The TC660 contains all the necessary circuitry to complete a voltage inverter (Figure 1), with the exception of two external capacitors, which may be inexpensive 150F polarized electrolytic capacitors. Operation is best understood by considering Figure 2, which shows an idealized voltage inverter. Capacitor C1 is charged to a voltage V+ for the half cycle when switches S1 and S3 are closed. (Note: Switches S2 and S4 are open during this half cycle.) During the second half cycle of operation, switches S2 and S4 are closed, with S1 and S3 open, thereby shifting capacitor C1 negatively by V+ volts. Charge is then transferred from C1 to C2, such that the voltage on C2 is exactly V+, assuming ideal switches and no load on C2. The four switches in Figure 2 are MOS power switches; S1 is a P-channel device, and S2, S3 and S4 are N-channel devices. The main difficulty with this approach is that in integrating the switches, the substrates of S3 and S4 must always remain reverse-biased with respect to their sources, but not so much as to degrade their ON resistances. In addition, at circuit start-up, and under output short circuit conditions (VOUT = V+), the output voltage must be sensed and the substrate bias adjusted accordingly. Failure to accomplish this would result in high power losses and possible device latch-up. This problem is eliminated in the TC660 by a logic network which senses the output voltage (VOUT) together with the level translators, and switches the substrates of S3 and S4 to the correct level to maintain necessary reverse bias. To improve low-voltage operation, the "LV" pin should be connected to GND, disabling the internal regulator. For supply voltages greater than 3.0V, the LV terminal should be left open to ensure latch-up-proof operation and prevent device damage.
S1 V+ S2
1
2
C2 S4 VOUT = - VIN
C1 S3
GND
3 4 5 6 7
Figure 2. Idealized Switched Capacitor
Theoretical Power Efficiency Considerations
In theory, a voltage multiplier can approach 100% efficiency if certain conditions are met: (1) The drive circuitry consumes minimal power. (2) The output switches have extremely low ON resistance and virtually no offset. (3) The impedances of the pump and reservoir capacitors are negligible at the pump frequency. The TC660 approaches these conditions for negative voltage multiplication if large values of C1 and C2 are used. Energy is lost only in the transfer of charge between capacitors if a change in voltage occurs. The energy lost is defined by: E = 1/2 C1 (V12 - V22)
V+ 1 2 C1 150 F + 3 4 8 7
IS V+ (+5V)
TC660
6 5 RL IL C2 150 F VOUT
V1 and V2 are the voltages on C1 during the pump and transfer cycles. If the impedances of C1 and C2 are relatively high at the pump frequency (refer to Figure 2) compared to the value of RL, there will be a substantial difference in voltages V1 and V2. Therefore, it is desirable not only to make C2 as large as possible to eliminate output voltage ripple, but also to employ a correspondingly large value for C1 in order to achieve maximum efficiency of operation.
+
Figure 1. TC660 Test Circuit (Inverter)
8
4-9
TELCOM SEMICONDUCTOR, INC.
100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC660
Dos and Don'ts
* Do not exceed maximum supply voltages. * Do not connect the LV terminal to GND for supply voltages greater than 3.0V. * Do not short circuit the output to V+ in inverting mode and for more than 10 sec (a very slow startup!) in doubler mode. * When using polarized capacitors in the inverting mode, the + terminal of C1 must be connected to pin 2 of the TC660 and the + terminal of C2 must be connected to GND. The output characteristics of the circuit in Figure 3 are those of a nearly ideal voltage source in series with 6.5. Thus, for a load current of -100mA and a supply voltage of +5V, the output voltage would be - 4.35V. The dynamic output impedance of the TC660 is due, primarily, to capacitive reactance of the charge transfer capacitor (C1). Since this capacitor is connected to the output for only 1/2 of the cycle, the equation is: 2 XC = = 0.21, 2f C1 where f = 10 kHz and C1 = 150 F.
Paralleling Devices Simple Negative Voltage Converter
Figure 3 shows typical connections to provide a negative supply where a positive supply is available. A similar scheme may be employed for supply voltages anywhere in the operating range of +1.5V to +5.5V, keeping in mind that pin 6 (LV) is tied to the supply negative (GND) only for supply voltages below 3.0V.
V 1 C1 150 F + 2 3 4 8 7 VOUT* C2 150 F +
Any number of TC660 voltage converters may be paralleled to reduce output resistance (Figure 4). The reservoir capacitor, C2, serves all devices, while each device requires its own pump capacitor, C1. The resultant output resistance would be approximately:
ROUT =
ROUT (of TC660) n (number of devices)
TC660
6 5
+
* NOTES: 1. VOUT = -V+ for 1.5V V+ 5.5V
Figure 3. Simple Negative Converter
V 1 2 C1 3 4 8 7
+
1 2 C1 3 4
8 7 RL
TC660
"1"
6 5
TC660
"n"
6 5
+
C2
Figure 4. Paralleling Devices Lowers Output Impedance 4-10
TELCOM SEMICONDUCTOR, INC.
100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC660
V+ 1 2 150 F + 3 4 8 7 1 2 150 F + 3 4 8 7
1
2
TC660
"n" 6 5 + VOUT* 150 F
TC660
"1"
6 5
3 4 5 6 7
* NOTE: . VOUT = -n(V+) for 1.5V V+ 5.5V
+
150 F
Figure 5. Increased Output Voltage by Cascading Devices
Cascading Devices
The TC660 may be cascaded as shown (Figure 5) to produce larger negative multiplication of the initial supply voltage. However, due to the finite efficiency of each device, the practical limit is 10 devices for light loads. The output voltage is defined by: VOUT = -n (VIN) where n is an integer representing the number of devices cascaded. The resulting output resistance would be approximately the weighted sum of the individual TC660 ROUT values.
Changing the TC660 Oscillator Frequency
It may be desirable in some applications (due to noise or other considerations) to increase the oscillator frequency. Pin 1, the FC pin, may be connected to V+ to increase oscillator frequency to 90kHz from a nominal of 10 kHz for an input supply voltage of 5.0 volts. The oscillator may also be synchronized to an external clock as shown in Figure 6 and LV must be grounded when overdriving OSC. In a situation where the designer has generated the external
V+ 1 2 150 F + 3 4 8 OSC 7 CMOS GATE V+
clock frequency using TTL logic, the addition of a 10k pullup resistor to V+ supply is required. Note that the pump frequency with external clocking, as with internal clocking, will be 1/2 of the clock frequency. Output transitions occur on the positive-going edge of the clock. It is also possible to increase the conversion efficiency of the TC660 at low load levels by lowering the oscillator frequency. This reduces the switching losses, and is achieved by connecting an additional capacitor, COSC, as shown in Figure 7. Lowering the oscillator frequency will cause an undesirable increase in the impedance of the pump (C1) and the reservoir (C2) capacitors. To overcome this, increase the values of C1 and C2 by the same factor that the frequency has been reduced. For example, the addition of a 100pF capacitor between pin 7 (OSC) and GND will lower the oscillator frequency to 1kHz from its nominal frequency of 10kHz (a multiple of 10), and necessitate a corresponding increase in the values of C1 and C2.
Positive Voltage Doubler
V+ 1 2 C1 + 3 4 8 7
TC660
6 5
COSC VOUT + C2
TC660
6 5 + VOUT 150 F
Figure 6. External Clocking
Figure 7. Lowering Oscillator Frequency 4-11
8
TELCOM SEMICONDUCTOR, INC.
100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC660
V+ 1 2 3 4 8 7 D1 D2 + C1 + C2
+ C1 1 8 7 + C3 V+ VOUT = -V+
TC660
6 5
VOUT = (2 V+) - (2 VF)
2 3 4 + C2
TC660
6 5
D1
D2
VOUT = (2 V +) - (2 VF) + C4
Figure 8. Positive Voltage Doubler
Figure 9 shows an improved way of using the TC660 as a voltage doubler. In this circuit, C1 is first charged to VIN and C2 is quickly brought to within a diode drop of VIN (to prevent substrate reversal) through D. The optional 200 resistor is only to limit the brief latchup current. On the next half-cycle, VIN is in series with C1; C2 is then charged to 2 VIN. D is now reverse-biased and plays no further part. For VIN < 3V, R may be necessary to ensure startup.
200 VIN D 1 2 C1 3 4 R = 0.1 - 1M 8 7 VOUT = 2 VIN C2 R
Figure 10. Combined Negative Converter and Positive Multiplier
Efficient Positive Voltage Multiplication/Conversion
Since the switches that allow the charge pumping operation are bidirectional, the charge transfer can be performed backward as easily as forward. Figure 11 shows a TC660 transforming -5V to +5V. The only problem here is that the internal clock and switch-drive section will not operate until some positive voltage has been generated. A diode and resistor shown dotted in Figure 11 can be used to "force" the internal regulator on.
TC660
6 5
VOUT = -V- 1 2 C1 150 F + 3 4 8 7 1 M
+
150 F
Figure 9. Improved Voltage Doubler
TC660
6 5 V- INPUT
Combined Negative Voltage Conversion and Positive Supply Multiplication
Figure 10 combines the functions shown in Figures 3 and 8 to provide negative voltage conversion and positive voltage multiplication simultaneously. In this instance, capacitors C1 and C3 perform the pump and reservoir functions, respectively, for the generation of the negative voltage, while capacitors C2 and C4 are pump and reservoir, respectively, for the multiplied positive voltage. There is a penalty in this configuration in that the source impedances of the generated supplies will be somewhat higher due to the finite impedance of the common charge pump driver at pin 2 of the device.
Figure 11. Positive Voltage Multiplier
4-12
TELCOM SEMICONDUCTOR, INC.

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